Part-time Software Intern at Silimate (S23)
$30 - $45  •  
The co-pilot for chip designers
Mountain View, CA, US
Internship
About Silimate

Silimate is the co-pilot for chip designers.

Chip teams today are still using the same archaic workflows from 30 years ago, resulting in lengthy 12-18 month design cycles and the inability to ship chips fast enough to keep up with the software pointer.

We're changing that at Silimate.

Our chip design co-pilot is helping chip designers write correct, PPA-optimized RTL code from the onset, and build better chips in less time. We're building a catalytic tool for the chip industry.

We're well-funded by top investors and are generating revenue with customers that are world-class chip and IP design companies. We're growing fast — demand for Silimate has outpaced our ability to build and ship the product. We're looking for talented engineers that are passionate about the semiconductor chip space to join us.

About the role
Skills: C++, Python, Verilog

We’re hiring a passionate software intern with basic VLSI experience and strong coding skills to build key flows for our co-pilot for chip designers!

This is an in-person part-time role for the Winter Quarter (approximately Jan-Mar 2025).

Who you are:

You’re excited about directly contributing to the growth and velocity of a fast-growing startup that is transforming the way chips are built by the entire industry.

You are resourceful, responsible, collaborative, and care intensely about the quality of your work.

You enjoy working in-person with others, and are able to come to our Mountain View office multiple times a week.

We ship product updates on a weekly basis, work in-person together in the Bay Area, and geek out about semiconductor news/technology advances. If this sounds like you, please apply to join the team!

What you’ll do:

  • Build a critical software project (Python/C++) that directly impacts Silimate’s 10+ chip/IP customers
  • Collaborate directly with our CTO Akash on key engineering design decisions

Minimum requirements:

  • Available for ~15-20 hours/week in-person in Mountain View, CA, from approximately January to March of 2025
  • Passionate and excited about chips and AI for EDA
  • Good at writing/shipping high-quality code (Python/C++) quickly
  • Has basic VLSI experience (coursework or projects)
  • Resilient, data-driven, and works from first principles

Benefits:

  • Generous salary (the listed salary range is pay per hour in USD)
  • Commuting stipend
  • Team meals

Apply to chat with the founders about the details!

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